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Mise en oeuvre de l'auto-reconfiguration partielle et dynamique sur FPGA Xilinx Virtex-II pro

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par Guy WASSI
Université Pierre et Marie Curie (Paris VI Jussieu) - Master informatique industrielle et systèmes automatisés 2005
  

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REFERENCES BIBLIOGRAPHIQUES

[1] Configuration Handbook, Volume 2. Chapitre Using Altera Enhanced Configuration Devices, page 2-15, Aout 2005.

[2] P. Benoit et al., Architectures Reconfigurables Dynamiquement pour Applications TSI. 3ème Colloque de CAO de circuits et systèmes intégrés, Mai 2002, Paris.

[3] B. Blodget, P. James-Roxby, E. Keller, S. McMillan, P. Sundararajan. «A Self-reconfiguring Platform», In Proc. of the Intern. Conference on Field Programmable Logic and Applications (FPL2003), Lisbon, Portugal, Sept. 2003.

[4] K. Compton, S. Hauck, Reconfigurable Computing: A Survey of Systems and Software. ACM Computing Surveys, Vol. 34, No. 2, June 2002, pp. 171-210.

[5] K. Danne, C. Bobda, H. Kalte. Increasing Efficiency by Partial Hardware Reconfiguration, Case Study of a Multi-Controller System, ERSA, 2003

[6] J-P. Delahaye. Systèmes Radio Dynamiquement Reconfigurables sur des Architectures Hétérogènes. Mémoire DEA SETI Université Paris XI, septembre 2003.

[7] D. Demigny, R. Bourguiba, L. Kessal et M. Leclerc. La reconfiguration dynamique des FPGAs: Que doit-on en attendre? 17ème colloque GRESTI, Vannes, Septembre 1999.

[8] M. Ericson, A. Nilsson. Runtime Reconfiguration System On a Chip. Master's Thesis in
Computer Science and Technology. School of Information Science, Computer and Electrical Engineering, Halmstad University.

[9] Cours Architecture des Systems Embarques de Gilliot J-M. ENST Bretagne. [En ligne] : http://perso-info.enst-bretagne.fr/~jgilliot/

[10] Y. Li, T. Callahan, E. Darnell, R. Harr, R. Kurkure. Hardware-software codesign of embedded reconfigurable architectures. Design Automation Conference, 507-512, 2000

[11] G. Meardi. FPGA-coupled Microprocessors : The challenge of Dynamic Reconfiguration, 1998

[12] Mermoud, G., A Module-Based Dynamic Partial Reconfiguration Tutorial. Logic Systems Laboratory, Ecole Polytechnique Fédérale de Lausanne, November 2004

[13] S. Pillement, O. Sentieys et R. David. Architectures Reconfigurables : un survol. LASTI - ENSSAT 26/04/2002

[14] Circuits reconfigurables:Les FPGAs, Eduardo Sanchez, Laboratoire des Systemes Logiques, EPFL. http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/12.FPGA.pdf

[15] J. Thorvinger. Dynamic Partial Reconfiguration of an FPGA for Computational Hardware Support. Master's thesis, Lund Institute of Technology, June 2004.

[16] A. Tisserand, Introduction aux circuits FPGA. Arénaire INRIA LIP, Séminaire Perpignan, juin 2004

[17] Leray, P., Weiss, J., Technologies SOC (System On Chip), Journée Recherche de Supélec Campus de Rennes le 28/02/ 2002.

[18] http://www.xilinx.com/literature/index.htm

[19] Development System Reference Guide, Xilinx 2005. http://toolbox.xilinx.com/docsan/xilinx7/books/data/docs/dev/dev0001_1.html

[20] Two flows for partial reconfiguration: Module based or difference based. Application Note 290, Xilinx, 2004.

[21] Virtex-II ProTM Platform FPGAs, «Introduction and Overview», http://direct.xilinx.com/bvdocs/publications/ds083-1.pdf, current June 2003.

[22] Modular Design, http://toolbox.xilinx.com/docsan/xilinx6/books/data/docs/dev/dev0026_7.html

[23] Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Complete Data Sheet, http://direct.xilinx.com/bvdocs/publications/ds083.pdf (Oct. 2005)

[24] Virtex-II Pro and Virtex-II Pro X FPGA User Guide UG012 (v4.0), 23 March 2005. http://direct.xilinx.com/bvdocs/userguides/ug012.pdf

[25] OPB HWICAP Product Specification DS 280 (v1.3), March 15, 2004 http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_hwicap.pdf

[26] EDK 7.1 PowerPC Tutorial in Virtex-4 v3.0, April 1, 2005 http://direct.xilinx.com/direct/ise7_tutorials/EDK7.1_ML403.pdf

[27] ISE 7 In-Depth Tutorial, http://direct.xilinx.com/direct/ise7_tutorials/ise7tut.pdf

[28] Constraints Guide ISE 7.1i, www.xilinx.com

[29] Virtex-II ProTM (P4/P7) Development Board User's Guide, Version 4.0, June 2003.

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